That is perfectly possible, but see #24.
I have to make three corrections to formerly discussed points, though:
1. PCIe actually has its own mechanisms for data-integrity protection between the card and CPU/chipset: LCRC with link-level replay can detect and recover transmission errors, ECRC can provide additional end-to-end error detection, and AER can report PCIe errors.
This means that the observed data corruption may have occurred somewhere outside the portion protected by PCIe's link-level CRC/replay mechanism.
2. The X570S chipset was formerly believed to be different from the X570, yet there is no proof of that. On the contrary, ASRock said it was only fine-tuning that made passive cooling possible. Other manufacturers made claims to this as well.
3. In the meantime, my counter-proof to the PCIe initialisation on warm boots was contradicted - see: https://github.com/torvalds/linux/commit/ae1737e7339b513f8c2fc21b500a0fc215d155c3 and https://bugzilla.kernel.org/show_bug.cgi?id=220770
Maybe this was an implementation fault in either the Windows driver, defective NICs or bad board layout on Asrock's behalf - I cannot tell nor investigate, because I do not have the cards any more. All I can say is that the problems existed and were solved by switching to the other NIC - which also has the advantage of being able to fully use 10 GbE over my 17m CAT5 link, which could not reliably be achieved with either an X550 or X540 before.
On a side note: chalk those inaccuracies up to my discontent about having to investigate such problems for weeks when I just wanted to have more speed on my main workstation.
I have to make three corrections to formerly discussed points, though:
1. PCIe actually has its own mechanisms for data-integrity protection between the card and CPU/chipset: LCRC with link-level replay can detect and recover transmission errors, ECRC can provide additional end-to-end error detection, and AER can report PCIe errors.
This means that the observed data corruption may have occurred somewhere outside the portion protected by PCIe's link-level CRC/replay mechanism.
2. The X570S chipset was formerly believed to be different from the X570, yet there is no proof of that. On the contrary, ASRock said it was only fine-tuning that made passive cooling possible. Other manufacturers made claims to this as well.
3. In the meantime, my counter-proof to the PCIe initialisation on warm boots was contradicted - see: https://github.com/torvalds/linux/commit/ae1737e7339b513f8c2fc21b500a0fc215d155c3 and https://bugzilla.kernel.org/show_bug.cgi?id=220770
Maybe this was an implementation fault in either the Windows driver, defective NICs or bad board layout on Asrock's behalf - I cannot tell nor investigate, because I do not have the cards any more. All I can say is that the problems existed and were solved by switching to the other NIC - which also has the advantage of being able to fully use 10 GbE over my 17m CAT5 link, which could not reliably be achieved with either an X550 or X540 before.
On a side note: chalk those inaccuracies up to my discontent about having to investigate such problems for weeks when I just wanted to have more speed on my main workstation.
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