:~ # dmidecode -t processor# dmidecode 3.5# SMBIOS entry point at 0x9f61c000Found SMBIOS entry point in EFI, reading table from /dev/mem.SMBIOS 2.8 present.Handle 0x003E, DMI type 4, 48 bytesProcessor Information Socket Designation: U3E1 Type: Central Processor Family: Celeron Manufacturer: Intel(R) Corporation ID: E9 06 08 00 FF FB EB BF Signature: Type 0, Family 6, Model 142, Stepping 9 Flags: FPU (Floating-point unit on-chip) VME (Virtual mode extension) DE (Debugging extension) PSE (Page size extension) TSC (Time stamp counter) MSR (Model specific registers) PAE (Physical address extension) MCE (Machine check exception) CX8 (CMPXCHG8 instruction supported) APIC (On-chip APIC hardware supported) SEP (Fast system call) MTRR (Memory type range registers) PGE (Page global enable) MCA (Machine check architecture) CMOV (Conditional move instruction supported) PAT (Page attribute table) PSE-36 (36-bit page size extension) CLFSH (CLFLUSH instruction supported) DS (Debug store) ACPI (ACPI supported) MMX (MMX technology supported) FXSR (FXSAVE and FXSTOR instructions supported) SSE (Streaming SIMD extensions) SSE2 (Streaming SIMD extensions 2) SS (Self-snoop) HTT (Multi-threading) TM (Thermal monitor supported) PBE (Pending break enabled) Version: Intel(R) Celeron(R) CPU 3965U @ 2.20GHz Voltage: 0.8 V External Clock: 100 MHz Max Speed: 8300 MHz Current Speed: 2100 MHz
:~ # powerd -vpowerd: unable to determine AC line statusCPU frequency is above user-defined maximum; changing frequency to 2200 MHzload 61%, current freq 2206 MHz ( 0), wanted freq 3588 MHzload 200%, current freq 2206 MHz ( 0), wanted freq 4400 MHzload 200%, current freq 2206 MHz ( 0), wanted freq 4400 MHzload 200%, current freq 2206 MHz ( 0), wanted freq 4400 MHz
dev.cpu.0.cx_lowest lowest CX sleep state to used runtime C3 dev.cpu.1.cx_lowest lowest CX sleep state to used runtime C3 dev.cpu.2.cx_lowest lowest CX sleep state to used runtime C3 dev.cpu.3.cx_lowest lowest CX sleep state to used runtime C3 hw.acpi.cpu.cx_lowest lowest CX sleep state to used runtime C3
It looks like your CPU supports Intel Speed Shift. You should be using hwpstate_intel driver instead and disable powerd.Please refer to handbook section about Intel Speed Shift https://docs.freebsd.org/en/books/handbook/config/#hwpstate_intel
Thanks Zan, this was quite unexpected.Looks like N5105 also uses hwpstate_intel0 -- Seimus.Interestingly powerd was also running on this FW I'm looking at...unsure how that would actually work. (now stopped while doing some reading)The cores are now idling at 797 Mhz in htop - which I haven't seen before.
$ sysctl dev.cpufreq.0.freq_driverdev.cpufreq.0.freq_driver: hwpstate_intel0