Show Posts
1
24.7 Production Series / [SOLVED] Hyperscan AVX-512 gcc arch flag
« on: September 06, 2024, 06:16:51 pm »
Hello OPNsense developers,
Background information on my questions. I have run Suricata performance tests with Ryzen 7700X and Ryzen 9700X and found that the throughput rates in my scenario are almost identical (23Gbit/s and 26Gbit/s). In the Ryzen 9000 generation, the AVX-512 performance should be twice as fast as in the 7000 generation.
Could it be that Hyperscan was built without AVX-512 support? Is that the reason for the low speed differences?
Documentation for reference:
https://intel.github.io/hyperscan/dev-reference/getting_started.html
Background information on my questions. I have run Suricata performance tests with Ryzen 7700X and Ryzen 9700X and found that the throughput rates in my scenario are almost identical (23Gbit/s and 26Gbit/s). In the Ryzen 9000 generation, the AVX-512 performance should be twice as fast as in the 7000 generation.
Could it be that Hyperscan was built without AVX-512 support? Is that the reason for the low speed differences?
Documentation for reference:
https://intel.github.io/hyperscan/dev-reference/getting_started.html
Quote
Hyperscan v5.3 adds support for AVX512VBMI instructions - in particular the AVX512VBMI instruction set that was introduced on Intel “Icelake” Xeon processors - however the AVX512VBMI runtime variant is not enabled by default in fat runtime builds as not all toolchains support AVX512VBMI instruction sets. To build an AVX512VBMI runtime, the CMake variable BUILD_AVX512VBMI must be enabled manually during configuration. For example:
cmake -DBUILD_AVX512VBMI=on <...>
