Messages

1

Hardware and Performance / Re: Embedded World 2020 - Nürnberg

« on: February 22, 2020, 03:01:56 pm »

A glimpse of the Boot Guard demo can be read on 3mdeb blog:

https://blog.3mdeb.com/2020/2020-02-18-ew2020-btg-demo/

2

Hardware and Performance / Embedded World 2020 - Nürnberg

« on: February 20, 2020, 04:23:42 pm »

Hi OPNsense folks,

Anybody attending the Embedded World 2020 this year?
3mdeb will be there with some exciting stuff and demos on the network appliance devices, booth 4-666:

1. Protectli Vault FW6 running Open Source Firmware coreboot with Intel Boot Guard demo: https://protectli.com/protectli-6-port/
2. Reasonably secure router - apu2 with SRTM/DRTM (Trenchboot), virtualized network interfaces (LAN and WIFI passthrough) and OPNsense as firewall virtual machine under Xen.

You can find us on Twitter, we will publish some more details soon:
https://twitter.com/3mdeb_com/status/1229449583320846336?s=20

Feel free to talk with us about how firmware affects OPNsense and what we can do to change that.

3

Hardware and Performance / Re: PCENGINES APU[1-5] Coreboot SeaBIOS Open Source Firmware

« on: January 17, 2020, 05:25:24 pm »

Hi OPNSense community,

It seems you are still experiencing some problems with ACPI and thermal zones/temperature reading.

Please do not be shy, you can always open a GitHub issue on https://github.com/pcengines/coreboot (or other repositories). That way we can respond really fast to your concerns and issues.

I must admit that the ACPI code for apu platforms is rather poor in terms of length (most of the things is a basic APCI code necessary for OS). coreboot community tries to update the ACPI code to be compliant with recent ACPI specifications. Some of the changes slipped our sight and introduced regressions. However, we work to improve that situation.

I see the Thermal Zone is not detected by ACPI. Unfortunately only apu1 has a Thermal Zone defined in ACPI.
As for apu2 we may add it also soon.

Cheers,
--
Michał Żygowski
Firmware Engineer
https://3mdeb.com | @3mdeb_com

4

Hardware and Performance / Re: PCENGINES APU[1-5] Coreboot SeaBIOS Open Firmware

« on: July 26, 2019, 04:30:26 pm »

may anyone confirm:

for the apu1c4 = 3 LAN, 4 GB DRAM, T40E CPU the version  on https://pcengines.github.io/ for apu1 should work.
But there's no legacy release, only the mainline release?

There never was an apu1 legacy in the first place. "The legacy" refers to the very first working BIOS code for apu2 developed for PC Engines. It was very stripped coreboot repository containing only apu2 mainboard and other important source code necessary to build firmware.

https://github.com/pcengines/coreboot/tree/coreboot-4.0.x/src/mainboard/pcengines

Unlike mainline source which is a fork of official coreboot and all mainboards are there, legacy only serves a purpose for building apu2 firmware with an older codebase.

5

Hardware and Performance / Re: PCENGINES APU[1-5] Coreboot SeaBIOS Open Firmware

« on: June 11, 2019, 10:10:00 am »

I've had massive problems with the latest firmware on a APU4, after googling a had to go back to 4.0.23, as i always lost connections, e.g. ssh - this ist not the case with 4.0.23.

Anybody else with this?

Hi ruggerio,

Please submit an issue here: https://github.com/pcengines/coreboot/issues

Also provide some more detailed description:

- detailed problem description (e.g. frequent SSH connection breaks), possibly with OS logs showing the problem
- firmware version before and after upgrade
- used platform (apu4a/b/c etc.)
- OS version
- any changes made to BIOS setup menu

Note that we are mostly validating firmware level features and simple OS installation. We cannot possibly validate production cases/setups. This is where the community comes with help and should report any problems.

6

Hardware and Performance / Re: PCENGINES APU[1-5] Bios

« on: March 25, 2019, 11:52:56 am »

Hello all,

We have validated installation of OPNSense 19.1 on most commonly used storage media. Enjoy the OS status update:

https://pcengines.github.io/

Cheers,
Michał

7

18.7 Legacy Series / Re: No Wifi (APU2. WLE200NX)

« on: March 04, 2019, 12:09:43 pm »

The slots should have labels near the connectors. If the slot is mPCIe1, it is correct then. We had no issues with those modems under Debian and pfsense. I wonder if this is related: https://github.com/pcengines/coreboot/issues/206

There is also a WLAN DISABLE signal on pin20 of the connector which may be acting as a RF kill switch. Currently, its setting is set to OUTPUT HIGH in BIOS which may cause issues. The pin should be driven 1.8V, but currently is driven at 3.3V. We are still investigating possible impacts.

8

18.7 Legacy Series / Re: No Wifi (APU2. WLE200NX)

« on: February 25, 2019, 01:59:13 pm »

Hi atmurphy,

Could You tell me what firmware version do You use?

Which mPCIe slot do You use for the card?

9

Hardware and Performance / Re: PCENGINES APU[1-5] Bios

« on: February 25, 2019, 01:44:58 pm »

Hello Dear OPNsense community,

Signatures and hashes for all previous firmware release are now available: https://pcengines.github.io/

Hi miczyg

Any chance I could remotely identify the chip running on this APU1C4 ? Dmidecode isn't helpful

Code: [Select]

flashrom -w apu1v4.9.0.2.rom -p internal
flashrom v1.0 on FreeBSD 11.2-RELEASE-p6 (amd64)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 4, resolution: 70ns).
coreboot table found at 0xdffdf000.
Found chipset "AMD SB7x0/SB8x0/SB9x0".
Enabling flash write... OK.
Found Macronix flash chip "MX25L1605" (2048 kB, SPI) mapped at physical address 0x00000000ffe00000.
Found Macronix flash chip "MX25L1605A/MX25L1606E/MX25L1608E" (2048 kB, SPI) mapped at physical address 0x00000000ffe00000.
Found Macronix flash chip "MX25L1605D/MX25L1608D/MX25L1673E" (2048 kB, SPI) mapped at physical address 0x00000000ffe00000.
Multiple flash chip definitions match the detected chip(s): "MX25L1605", "MX25L1605A/MX25L1606E/MX25L1608E", "MX25L1605D/MX25L1608D/MX25L1673E"
Please specify which chip definition to use with the -c <chipname> option.


Hi newsense,

Yes this is a common problem with apu1, since few Macronix SPI chips have the same JEDEC ID and flashrom can not distinguish them. Try passing:

-c "MX25L1605A/MX25L1606E/MX25L1608E"

to flashrom as an argument and it will be ok. We have mentioned it here too: https://github.com/pcengines/apu2-documentation/blob/master/docs/firmware_flashing.md#corebootrom-flashing

10

Hardware and Performance / Re: PCENGINES APU[1-5] Bios

« on: February 21, 2019, 11:47:58 am »

Hi pietrushnic

I bring both lousy and awesome news...

Just received an APU4C4 which came with a stock BIOS v4.6.4 which fails to update to either v4.9.0.2 or v4.9.0.1 with a weird FIFO message that I couldn't find on Github or PCEngines forums:

Code: [Select]

FIFO pointer corruption! Pointer is 6, wanted 3

For the time being, nothing is plugged in the board other than power, USB stick and serial cable.


The awesome news however is that it successfully booted 19.1


Your help and guidance with regards to the BIOS update would be very much appreciated. Full output of the BIOS update attempt and live boot are attached.

Hi newsense,

I am Michał Żygowski, firmware engineer in 3mdeb, PC Engines firmware co-maintainer.

After looking at the log, I can see it is a flashrom error. We use only flashrom version 0.9.9+ and I advise You to do the same. Older versions of flashrom may not have the right chipset interface implemented.

Flashrom is not a part of firmware, it is just linux utility to flash firmware. I am pretty sure the newer flashrom will do the trick. PC Engines tinycore is not the only way to flash the firmware, You can use any Linux and install flashrom (or compile it if You are confident about Your skills). If You encounter any problems feel free to ask questions. I will help as much as possible.